Google announced two more eighth-generation TPU systems on November 9: TPU 8tx, built on the same silicon as the training-focused 8t and paired with fifth-generation AMD EPYC hosts to keep data and weights isolated in use, and TPU 8i Max, which packages two 8i inference chips together for double the compute, SRAM and HBM bandwidth in the same rack footprint. Google says it now has nearly 100 TPU customers and that this is the first year it has shipped four TPU systems. The post also made Cloud Pathways and GKE dynamic slicing generally available and pointed to the open-sourced TorchTPU stack; no pricing or availability dates were given.
ML engineersTorchTPU with vLLM and SGLang backends removes the main reason PyTorch teams stayed on Nvidia. TPU Sync's tiered KV cache, claiming over 90% lower time-to-first-token, is the piece to benchmark.
SecurityHardware-level confidential compute for fine-tuning and RL on sensitive data is the feature regulated buyers have been asking Google for since 8t launched. Ask for the attestation flow, not the brochure.
FinanceA credible second supplier of training-class accelerators at scale is the single biggest check on Nvidia's pricing. Four systems in a year is the cadence to watch, not any one chip.
ExecutivesIf you are negotiating a multi-year cloud commitment, Google's TPU roadmap is now a lever on price even if you never run on it.
BeginnersGoogle makes its own AI chips so it does not have to buy everything from Nvidia. It just added two more types, one built for keeping private data private.